In recent years there has been an increasing requirement for greater compactness of various types of circuits for high frequency operation. Advances in semiconductor technology have made it possible to miniaturize the circuit elements, i.e. by utilizing integrated circuit techniques. In addition, various proposals have been made for improvements in the techniques for interconnecting and mounting the circuit components, with the objective of providing satisfactory performance when the overall circuit size is miniaturized, in spite of the fact that components are brought into close mutual proximity.
One such proposal is made for example in Japanese Patent Laid-open No. 61-159793. This describes a high frequency circuit which utilizes a multi-layer connecting lead substrate including a number of dielectric layers, with no substantial limitation being placed on the number of layers which can be incorporated. Due to considerations of the number of processing operations required during manufacture, reliability, and mechanical strength, all of the dielectric layers in the multi-layer connecting lead substrate of that prior art patent are made of identical thickness.
Such a multi-layer connecting lead substrate has component mounting patterns (i.e. patterns of connecting leads, component mounting pads, etc, formed from a layer of electrically conducting material) formed on the upper and lower external faces. In addition, other metallic layers are sandwiched between the dielectric layers, and may be formed into connecting lead patterns, which can be connected to patterns of other layers (i.e. via through-hole connections for example) to implement a 3-dimensional connecting lead system. Alternatively, such intermediate layers of electrically conducting material may be left in an unpatterned condition, and utilized for electrical shielding between other layers.
Due to the fact that a 3-dimensional connecting lead system can be formed in this way, and that shielding can be implemented between the layers, such a multi-layer connecting lead substrate can be utilized to form an extremely compact electric circuit, so that such multi-layer substrates have a very wide range of applicability. However a problem arises if a multi-layer connecting lead substrate having the configuration described above is used to implement a circuit for high frequency operation (e.g. for operation at frequencies in the region of several hundred MHz or higher) in which a microstrip (i.e. short length of strip conductor disposed above a ground plane layer, or between two ground plane layers), is utilized as a resonance element. As is well known, such a microstrip functions at a specific frequency as the equivalent of a series resonance circuit, and at a specific higher frequency functions as a parallel resonance circuit. Such resonance elements are utilized for example in high frequency oscillator or amplifier circuits. The problem which arises is that if such a microstrip resonance element is formed using a prior art type of multi-layer substrate, a substantially high level of electrical loss occurs for that element. Thus, the effective Q-factor of the microstrip resonator may be insufficiently high for desired circuit operation.